FDB035N10A n-chan nel powertrench ? mosfet ?2012 fairchild semiconductor corporation FDB035N10A rev. c0 www.fairchildsemi.com 1 may 2012 FDB035N10A n-channel powertrench ? mosfet 100v, 214a, 3.5m features ?r ds(on) = 3.0m ( typ.)@ v gs = 10v, i d = 75a ? fast switching speed ? low gate charge ? high performance trench tec hnology for extremely low r ds(on) ? high power and current handling capability ? rohs compliant description this n-channel mosfet is pr oduced using fairchild semicon- ductor?s advanced powertrench process that has been espe- cially tailored to minimize the on-state resistance and yet maintain superior switching performance. application ? dc to dc converters ? synchronous rectification for server/telecom psu ? battery charger ? ac motor drives and uninterruptible power supplies ? off-line ups d g s d 2 -pak fdb series g s d mosfet maximum ratings t c = 25 o c unless otherwise noted *calculated continuous current based on maximum allowable ju nction temperature. package limitation current is 120a. thermal characteristics symbol parameter ratings units v dss drain to source voltage 100 v v gss gate to source voltage 20 v i d drain current - continuous (t c = 25 o c, silicon limited) 214* a - continuous (t c = 100 o c, silicon limited) 151* - continuous (t c = 25 o c, package limited) 120 i dm drain current - pulsed (note 1) 856 a e as single pulsed avalanche energy (note 2) 658 mj dv/dt peak diode recovery dv/dt (note 3) 6.0 v/ns p d power dissipation (t c = 25 o c) 333 w - derate above 25 o c2.22w/ o c t j , t stg operating and storage temperature range -55 to +175 o c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 o c symbol parameter ratings units r jc thermal resistance, junction to case 0.45 o c/w r ja thermal resistance, junction to ambient (minimum pad of 2 oz copper) 62.5 thermal resistance, junction to ambient (1 in 2 pad of 2 oz copper) 40
FDB035N10A n-chan nel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 2 package marking and ordering information electrical characteristics t c = 25 o c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics device marking device package reel size tape width quantity FDB035N10A FDB035N10A d2-pak 330mm 24mm 800 symbol parameter test conditions min. typ. max. units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0v, t c = 25 o c 100 - - v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 o c - 0.07 - v/ o c i dss zero gate voltage drain current v ds = 80v, v gs = 0v - - 1 a v ds = 80v, t c = 150 o c - - 500 i gss gate to body leakage current v gs = 20v, v ds = 0v - - 100 na v gs(th) gate threshold voltage v gs = v ds , i d = 250 a2.0-4.0v r ds(on) static drain to source on resistance v gs = 10v, i d = 75a - 3.0 3.5 m g fs forward transconductance v ds = 10v, i d = 75a - 167 - s c iss input capacitance v ds = 25v, v gs = 0v f = 1mhz - 5485 7295 pf c oss output capacitance - 2430 3230 pf c rss reverse transfer capacitance - 210 - pf q g(tot) total gate charge at 10v v ds = 80v, i d = 75a v gs = 10v (note 4) - 89 116 nc q gs gate to source gate charge - 24 - nc q gs2 gate charge threshold to plateau - 8 - nc q gd gate to drain ?miller? charge - 25 - nc t d(on) turn-on delay time v dd = 50v, i d = 75a v gs = 10v, r gen = 4.7 (note 4) -2254ns t r turn-on rise time - 54 118 ns t d(off) turn-off delay time - 37 84 ns t f turn-off fall time - 11 32 ns esr equivalent series resistance (g-s) drain shorted to source, f = 1mhz - 1.2 - i s maximum continuous drain to source diode forward current - - 214 a i sm maximum pulsed drain to source diode forward current - - 856 a v sd drain to source diode forward voltage v gs = 0v, i sd = 75a - - 1.25 v t rr reverse recovery time v gs = 0v, i sd = 75a, v dd = 80v di f /dt = 100a/ s -72-ns q rr reverse recovery charge - 129 - nc notes: 1. repetitive rating: pulse width limi ted by maximum junction temperature 2. starting t j = 25 c, l = 1mh, i as = 36.3a 3. i sd 75a, di/dt 200a/ s, v dd bv dss , starting t j = 25 c 4. essentially independent of operating temperature typical characteristics
FDB035N10A n-chan nel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.02 0.1 1 10 2 10 100 600 *notes: 1. 250 s pulse test 2. t c = 25 o c v gs = 15.0 v 10.0 v 8.0 v 7.0 v 6.0 v 5.5 v 5.0 v i d , drain current[a] v ds , drain-source voltage[v] 23456 1 10 100 300 -55 o c 150 o c *notes: 1. v ds = 10v 2. 250 s pulse test 25 o c i d , drain current[a] v gs , gate-source voltage[v] 0.2 0.4 0.6 0.8 1.0 1.2 1 10 100 500 *notes: 1. v gs = 0v 2. 250 s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0 60 120 180 240 300 360 0.0025 0.0030 0.0035 0.0040 *note: t c = 25 o c v gs = 20v v gs = 10v r ds(on) [ ], drain-source on-resistance i d , drain current [a] 0306090 0 2 4 6 8 10 *note: i d = 75a v ds = 20v v ds = 50v v ds = 80v v gs , gate-source voltage [v] q g , total gate charge [nc] 0.1 110 30 100 5000 10000 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v]
FDB035N10A n-chan nel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 4 typical performanc e characteristics figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 11. unclamped inductive switching capability -100 -50 0 50 100 150 200 0.6 0.9 1.2 1.5 1.8 2.1 *notes: 1. v gs = 10v 2. i d = 75a r ds(on) , [normalized] drain-source on-resistance t j , junction temperature [ o c ] -100 -50 0 50 100 150 200 0.90 0.95 1.00 1.05 1.10 *notes: 1. v gs = 0v 2. i d = 10ma bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] 0.1 1 10 100 300 0.1 1 10 100 1000 2000 100us 10us 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 175 o c 3. single pulse dc 25 50 75 100 125 150 175 0 50 100 150 200 250 limited by package i d , drain current [a] t c , case temperature [ o c ] 0.01 0.1 1 10 100 1000 1 10 100 starting t j = 150 o c starting t j = 25 o c i as , avalanche current (a) t av , time in avalanche (ms) if r = 0 t av = (l) ( i as ) / ( 1.3*rated bv dss -v dd ) if r = 0 t av = (l/r)in [( i as *r ) / ( 1.3*rated bv dss -v dd ) +1 ]
FDB035N10A n-chan nel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 5 10 -5 10 -4 10 -3 10 -2 10 -1 1 0.001 0.01 0.1 1 0.01 0.1 0.2 0.05 0.02 *notes: 1. z jc (t) = 0.45 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z jc (t) 0.5 single pulse thermal response [ z jc ] rectangular pulse duration [sec] typical performance characteristics figure 12 . transient thermal response curve t 1 p dm t 2
FDB035N10A n-chan nel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 6 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
FDB035N10A n-chan nel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 7 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
FDB035N10A n-chan nel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 8 mechanical dimensions d2-pak land pattern recommendation detail a, rotated 90 scale: 2x 2 seating plane 3 4 gage plane 1 2 1 4 3 see detail a 10.67 9.65 1.68 1.00 9.65 8.38 1.78 max 1.78 1.14 0.99 0.51 5.08 (2.12) 6.22 min 6.86 min 15.88 14.61 1.65 1.14 4.83 4.06 0.74 0.33 8 0 8 0 2.79 1.78 (5.38) 0.25 max 0.25 0.25 a b m m -a- -b- 0.10 b notes: unless otherwise specified a) all dimensions are in millimeters. b) reference jedec, to-263, variation ab. c) dimensioning and tolerancing per ansi y14.5m - 1994. d) location of the pin hole may vary (lower left corner, lower center and center of the package). e) landpattern recommendation per ipc to254p1524x482-3n f) filename: to263a02rev6 12.70 9.45 3.80 1.05 (6.40) 10.00 unless noted, all dims typical 5.08 dimensions in millimeters
FDB035N10A n-channel powertrench ? mosfet FDB035N10A rev. c0 www.fairchildsemi.com 9 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairch ild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devic es or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a sign ificant injury of the user. 2. a critical component in any com ponent of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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